High-level synthesis: introduction to chip and system design
High-level synthesis: introduction to chip and system design
Algorithms for approximate FSM traversal
DAC '93 Proceedings of the 30th international Design Automation Conference
Effectiveness of the ASIP design system PEAS-III in design of pipelined processors
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Introducing Core-Based System Design
IEEE Design & Test
On core and more: a design perspective for systems-on-a-chip
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
Proceedings of the 47th Design Automation Conference
System-Level Synthesis for Wireless Sensor Node Controllers: A Complete Design Flow
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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The popularity of Soft Cores is rapidly increasing. Their integration in a design requires their synthesis and optimization, thus their application is more complex than the use of Hard Cores. However, Soft Cores can be customized to the design constraints, thus promising to lead to more efficient designs. The decision of using Soft or Hard Cores} is difficult since it is a trade-off between performance, cost and design time. The parametrization methodology presented in this paper gives to the Soft Core providers the possibility of putting on the market easily customizable versions of their Cores. Moreover, the proposed Soft-Cores generator helps the designer to select between the Soft and the Hard-Core version of a processor.