BURG: fast optimal instruction selection and tree parsing
ACM SIGPLAN Notices
Instruction selection using binate covering for code size optimization
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Soft-cores generation by instruction set analysis
Proceedings of the 14th international symposium on Systems synthesis
Wireless sensor networks: a survey
Computer Networks: The International Journal of Computer and Telecommunications Networking
SPARK: A High-Lev l Synthesis Framework For Applying Parallelizing Compiler Transformations
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Energy Scavenging for Wireless Sensor Networks: With Special Focus on Vibrations
Energy Scavenging for Wireless Sensor Networks: With Special Focus on Vibrations
Contiki - A Lightweight and Flexible Operating System for Tiny Networked Sensors
LCN '04 Proceedings of the 29th Annual IEEE International Conference on Local Computer Networks
Generating Efficient Custom FPGA Soft-Cores for Control-Dominated Applications
ASAP '05 Proceedings of the 2005 IEEE International Conference on Application-Specific Systems, Architecture Processors
Design of a wireless sensor network platform for detecting rare, random, and ephemeral events
IPSN '05 Proceedings of the 4th international symposium on Information processing in sensor networks
Synthesis of an application-specific soft multiprocessor system
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays
Exploring the Processor and ISA Design for Wireless Sensor Network Applications
VLSID '08 Proceedings of the 21st International Conference on VLSI Design
Automatic architecture refinement techniques for customizing processing elements
Proceedings of the 45th annual Design Automation Conference
Quanto: tracking energy in networked embedded systems
OSDI'08 Proceedings of the 8th USENIX conference on Operating systems design and implementation
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Wireless Sensor Networks (WSN) are a new and very challenging research field for embedded system design automation, as their design must enforce stringent constraints in terms of power and cost. WSN node devices have until now been designed using off-the-shelf low-power microcontroller units (MCUs), even if their power dissipation is still an issue and hinders the wide-spreading of this new technology. In this paper, we propose a new architectural model for WSN nodes (and its complete design-flow from C downto synthesizable VHDL) based on the notion of micro-tasks. Our approach combines hardware specialization and power-gating so as to provide an ultra low-power solution for WSN node design. Our first estimates show that power savings by one to two orders of magnitude are possible w.r.t. MCU-based implementations.