Design patterns: elements of reusable object-oriented software
Design patterns: elements of reusable object-oriented software
The Unified Modeling Language user guide
The Unified Modeling Language user guide
The design space layer: supporting early design space exploration for core-based designs
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Virtual components application and customization
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Reuse of IP and virtual components
DATE '99 Proceedings of the conference on Design, automation and test in Europe
ipChinook: an integrated IP-based design framework for distributed embedded systems
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Surviving the SOC revolution: a guide to platform-based design
Surviving the SOC revolution: a guide to platform-based design
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Component selection and matching for IP-based design
Proceedings of the conference on Design, automation and test in Europe
MetaRTL: raising the abstraction level of RTL design
Proceedings of the conference on Design, automation and test in Europe
An object-oriented model for specification, prototyping, implementation and reuse
Proceedings of the conference on Design, automation and test in Europe
MetaCores: design and optimization techniques
Proceedings of the 38th annual Design Automation Conference
Soft-cores generation by instruction set analysis
Proceedings of the 14th international symposium on Systems synthesis
Compilation for Adaptive Computing Systems Using Complex Parameterized Hardware Objects
The Journal of Supercomputing
Digital Design and Modeling with VHDL and Synthesis
Digital Design and Modeling with VHDL and Synthesis
Developing Architectural Platforms: A Disciplined Approach
IEEE Design & Test
Soft IP Design Framework Using Metaprogramming Techniques
DIPES '02 Proceedings of the IFIP 17th World Computer Congress - TC10 Stream on Distributed and Parallel Embedded Systems: Design and Analysis of Distributed Embedded Systems
Application of design patterns for hardware design
Proceedings of the 40th annual Design Automation Conference
Deterministic Clock Gating for Microprocessor Power Reduction
HPCA '03 Proceedings of the 9th International Symposium on High-Performance Computer Architecture
Platform-Based Design: A Path to Efficient Design Re-Use
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Application of UML for hardware design based on design process model
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Accomplishments and research challenges in meta-programming
SAIG'01 Proceedings of the 2nd international conference on Semantics, applications, and implementation of program generation
Platune: a tuning framework for system-on-a-chip platforms
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A UML-based approach for heterogeneous IP integration
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
A compiler intermediate representation for reconfigurable fabrics
International Journal of Parallel Programming
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We propose a layered Soft IP Customisation (SIPC) model for specifying and implementing system-level soft IP design processes such as wrapping and customisation. The SIPC model has three layers: (1) Specification Layer for specification of a customisation process using UML class diagrams, (2) Generalisation Layer for representation of a customisation process using the metaprogramming techniques, and (3) Generation Layer for generation of the customised soft IP instances from metaspecifications. UML allows us to specify customisation of soft IPs at a high level of abstraction. Metaprogramming allows us to manage variability in a domain, develop generic domain components, and describe generation of customised component instances. The usage of the SIPC model eases and accelerates reuse, adaptation and integration of the pre-designed soft IPs into new hardware designs.