Designing a multi-core hard real-time test bed for energy measurement experiments
Proceedings of the 2009 ACM symposium on Applied Computing
Design of a hard real-time multi-core testbed for energy measurement
Microelectronics Journal
Quasi-static fault-tolerant scheduling schemes for energy-efficient hard real-time systems
Journal of Systems and Software
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Energy-efficient task allocation and scheduling schemes with deterministic fault-tolerance capabilities are proposed for symmetric multiprocessor systems executing tasks with hard real-time constraints. The proposed heuristic is proven to achieve energy savings by optimally balancing application workload among processors in a system. Based on the observation that fault-free operation is expected to remain dominant in the near future and the probability of the worst case faults is low, an optimistic fault-tolerant heuristic is then proposed to achieve maximum energy savings in the absence of faults while degrading gradually to meet application timing requirements in the worst case of faults. Simulation results show that compared to state-of-art allocation and scheduling schemes proposed heuristic achieves average energy savings of up to 70%. It is also shown that optimistic approach is more resilient to variations in application utilizations and fault occurrences beyond system specifications.