DVFS Aware Techniques on Parallel Architecture Core (PAC) Platform

Authors:
Shau-Yin Tseng;Ming-Wei Chang
Affiliations:
-;-
Venue:
ICESSSYMPOSIA '08 Proceedings of the 2008 International Conference on Embedded Software and Systems Symposia
Year:
2008

Citing 0
Cited 1

Algorithm/architecture co-exploration of visual computing on emergent platforms: overview and future prospects

IEEE Transactions on Circuits and Systems for Video Technology

Quantified Score

Hi-index	0.00

Visualization

Abstract

Rapid developments of multimedia and communication technologies enrich the applications of portable devices. However, design flexibility and low power are two important criteria for real-time system development. In this paper, a DVFS-aware implementation is introduced to demonstrate intelligent dynamic voltage and frequency scaling (DVFS) technique on dual-core PAC Platform. The power management of DVFS technique is verified with the H.264/AVC decoder example which can save 46% of power consumption.