Push-assisted migration of real-time tasks in multi-core processors
Proceedings of the 2009 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Cache-aware scheduling and analysis for multicores
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
Generalized tardiness bounds for global multiprocessor scheduling
Real-Time Systems
Online cache modeling for commodity multicore processors
ACM SIGOPS Operating Systems Review
Proceedings of the 48th Annual Southeast Regional Conference
Predictable task migration for locked caches in multi-core systems
Proceedings of the 2011 SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
Joint task assignment and cache partitioning with cache locking for WCET minimization on MPSoC
Journal of Parallel and Distributed Computing
Static task partitioning for locked caches in multi-core real-time systems
Proceedings of the 2012 international conference on Compilers, architectures and synthesis for embedded systems
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Multicore architectures, which have multiple processing units on a single chip, have been adopted by most chip manufacturers. Most such chips contain on-chip caches that are shared by some or all of the cores on the chip. To effectively use the available processing resources on such platforms,scheduling methods must be aware of these caches. In this paper, we explore various heuristics that attempt to improve cache performance when scheduling real-time workloads. Such heuristics are applicable when multiple multithreaded applications exist with large working sets. In addition, we present a case study that shows how our best-performing heuristics can improve the end-user performance of video encoding applications.