Improving the static real-time scheduling on multicore processors by reducing worst-case inter-thread cache interferences

  • Authors:
  • Yiqiang Ding;Wei Zhang

  • Affiliations:
  • Southern Illinois University Carbondale;Southern Illinois University Carbondale

  • Venue:
  • Proceedings of the 48th Annual Southeast Regional Conference
  • Year:
  • 2010

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Abstract

As well known, knowing the worst-case execution time (WCET) of real-time tasks is crucial for schedulability analysis in a real-time system. In a multicore computing environment, however, the inter-thread interferences in the shared resources such as the shared cache can significantly affect the WCET of each real-time task, making the actual (i.e runtime) WCET quite different from the statically estimated WCET obtained before scheduling. In this paper, we present a novel static real-time scheduling approach on multicore platforms based on the WCET of target real-time tasks provided by considering the worst case inter-thread interferences in the shared L2 cache. Furthermore a greedy algorithm is integrated into the static scheduling approaches to generate safe schedules while minimizing the worst-case inter-thread cache interferences and WCET.