Performance modelling and analysis of interconnection networks with spatio-temporal bursty traffic
GLOBECOM'09 Proceedings of the 28th IEEE conference on Global telecommunications
Journal of Systems and Software
An analytical model for on-chip interconnects in multimedia embedded systems
ACM Transactions on Embedded Computing Systems (TECS) - Special Section on ESTIMedia'10
Hi-index | 0.00 |
Pipelined circuit switching which combines the advantages of both circuit switching and wormhole switching is an efficient method for reconciling the conflicting demands of communication performance and fault-tolerance in interconnection networks of multi-computers. The arrival process and destination distribution of messages generated by real-world parallel applications can markedly affect the performance of communication networks. This paper presents an analytical performance model to calculate the message latency in hypercube interconnection networks with pipelined circuit switching in the presence of bursty and correlated traffic coupled with hot-spot message destinations. The accuracy of the analytical model is validated through extensive simulation experiments.