The Formal Description and Verification of Hardware Timing

  • Authors:
  • George J. Milne

  • Affiliations:
  • -

  • Venue:
  • IEEE Transactions on Computers
  • Year:
  • 1991

Quantified Score

Hi-index 14.98

Visualization

Abstract

A formalism in which timing properties of digital hardware may be specified, derived, and formally verified is introduced as a rigorous theory for hardware timing. A rigorous modeling framework has been used to create a family of related verification techniques rather than a single timing analysis tool. This framework is based on a model of interacting finite state machines called CIRCAL, a formalism developed for the purpose of describing and validating complex concurrent systems. In this approach to hardware timing analysis, the presence of a composition operator is all-pervasive. It provides a single, uniform mechanism for describing the behavior of interacting hardware modules and for establishing and describing the timing properties of such modules.