Building asynchronous routers with independent sub-channels
SOC'09 Proceedings of the 11th international conference on System-on-chip
Asynchronous data-driven circuit synthesis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Modeling and synthesis of asynchronous pipelines
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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This paper describes a method of synthesising asynchronous circuits based on the Handshake Circuit paradigm but employing a data-driven, rather than the control-driven, style. This approach attempts to combine the performance advantages of data-driven asynchronous design styles with the handshake circuit style of construction. The integration into the existing Balsa design flow of a compiler for descriptions written in a new datadriven language is described. The method is demonstrated using a significant design example — a 32 bit microprocessor. This example shows that the datadriven circuit style provides better performance than conventional control-driven Balsa circuits.