Energy reduction techniques for multimedia applications with tolerance to deadline misses
Proceedings of the 40th annual Design Automation Conference
Quality-adaptive media streaming by priority drop
NOSSDAV '03 Proceedings of the 13th international workshop on Network and operating systems support for digital audio and video
Dynamic Voltage Scaling on MPEG Decoding
ICPADS '01 Proceedings of the Eighth International Conference on Parallel and Distributed Systems
Proceedings of the 15th international conference on Multimedia
Overview of the H.264/AVC video coding standard
IEEE Transactions on Circuits and Systems for Video Technology
H.264/AVC baseline profile decoder complexity analysis
IEEE Transactions on Circuits and Systems for Video Technology
Energy-efficient real-time scheduling of multimedia tasks on multi-core processors
Proceedings of the 2010 ACM Symposium on Applied Computing
Practical design space exploration of an h264 decoder for handheld devices using a virtual platform
PATMOS'09 Proceedings of the 19th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
A real-time, energy-efficient system software suite for heterogeneous multicore platforms
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
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As the importance of multimedia applications in hand-held devices increases, the computational strain and corresponding demand for energy in such devices continues to grow. Portable multimedia devices with inherently limited energy supplies face tight energy constraints and require optimization for energy conservation. Power-aware applications give their users flexibility to prioritize and trade between performance and battery-life. This paper introduces a power-aware technique for user selectable power reduction in exchange for controlled reductions in video quality for H.264 video streams. The technique uses an encoder-decoder pair. The encoder characterizes video streams and provides information to the decoder via Flexible Macroblock Ordering (FMO) by generating prioritized slice groups. The decoder selectively ignores low priority slice groups based on user selected preference effectively reducing the decoder workload. With a reduced computational requirement, processor voltage and frequency scaling (DVFS) significantly improve decoder power performance within timing constraints. Our PXA270 system implementation resulted in power savings of as much as 53% with an average PSNR per frame of 24dB compared to the unmodified video.