The Design and Use of Hazard-Free Switching Networks
Journal of the ACM (JACM)
Design of Asynchronous Circuits Assuming Unbounded Gate Delays
IEEE Transactions on Computers
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Synopsis: The circuits and organization of present computers are such that possible operating speeds are lower than the capabilities of the components. The speed limitations of such synchronous computers will be described, and design criteria for higher speed operation set forth. Examples will be given for a logic and circuit organization which results in both faster operation and improved performance to cost ratios. In particular, circuits which are free of transient logical malfunctions, sometimes called "spikes," will be developed and a typical autosynchronous system will be shown.