New technique for improving performance of LDPC codes in the presence of trapping sets

  • Authors:

  • Esa Alghonaim;Aiman El-Maleh;Mohamed Adnan Landolsi

  • Affiliations:

  • Computer Engineering Department, King Fahd University of Petroleum & Minerals, Dhahran, Kingdom of Saudi Arabia;Computer Engineering Department, King Fahd University of Petroleum & Minerals, Dhahran, Kingdom of Saudi Arabia;Electrical Engineering Department, King Fahd University of Petroleum & Minerals, Dhahran, Kingdom of Saudi Arabia

  • Venue:
  • EURASIP Journal on Wireless Communications and Networking - Advances in Error Control Coding Techniques
  • Year:
  • 2008

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Abstract

Trapping sets are considered the primary factor for degrading the performance of low-density parity-check (LDPC) codes in the error-floor region. The effect of trapping sets on the performance of an LDPC code becomes worse as the code size decreases. One approach to tackle this problem is to minimize trapping sets during LDPC code design. However, while trapping sets can be reduced, their complete elimination is infeasible due to the presence of cycles in the underlying LDPC code bipartite graph. In this work, we introduce a new technique based on trapping sets neutralization to minimize the negative effect of trapping sets under belief propagation (BP) decoding. Simulation results for random, progressive edge growth (PEG) and MacKay LDPC codes demonstrate the effectiveness of the proposed technique. The hardware cost of the proposed technique is also shown to beminimal.