A 105-bit high-speed ferrite memory system: design and operation

Authors:
H. Amemiya;T. R. Mayhew;R. L. Pryor
Affiliations:
Radio Corporation of America, Camden, New Jersey;Radio Corporation of America, Camden, New Jersey;Radio Corporation of America, Camden, New Jersey
Venue:
AFIPS '64 (Fall, part I) Proceedings of the October 27-29, 1964, fall joint computer conference, part I
Year:
1964

Citing 2
Cited 3

Ferrite apertured plate for random-access memory

AIEE-IRE '56 (Eastern) Papers and discussions presented at the December 10-12, 1956, eastern joint computer conference: New developments in computers
High-speed ferrite memories

AFIPS '62 (Fall) Proceedings of the December 4-6, 1962, fall joint computer conference

Monolithic ferrite memories

AFIPS '65 (Fall, part I) Proceedings of the November 30--December 1, 1965, fall joint computer conference, part I
High speed ferrite 2 1/2 D memory

AFIPS '65 (Fall, part I) Proceedings of the November 30--December 1, 1965, fall joint computer conference, part I
A 110-nanosecond ferrite core memory

IBM Journal of Research and Development

Quantified Score

Hi-index	0.00

Visualization

Abstract

With the advancement of computer technology in recent years, the demand for a very-high-speed memory has greatly increased. Scratch-pad memories of smaller than 100 words with cycle times faster than 500 nano-seconds are commonly found in computers on the market. However, larger memories of the same speed range are not yet commercially available, due to the fact that the problems in building a large memory are much more complicated than those in building a small memory. These problems center around the transients generated in the digit sense system.