Exploiting symmetry in temporal logic model checking
Formal Methods in System Design - Special issue on symmetry in automatic verification
Formal Methods in System Design - Special issue on symmetry in automatic verification
Communicating sequential processes
Communications of the ACM
Communication and Concurrency
The Theory and Practice of Concurrency
The Theory and Practice of Concurrency
Concurrency and Automata on Infinite Sequences
Proceedings of the 5th GI-Conference on Theoretical Computer Science
LICS '00 Proceedings of the 15th Annual IEEE Symposium on Logic in Computer Science
Symmetry in temporal logic model checking
ACM Computing Surveys (CSUR)
The modelling and analysis of security protocols: the csp approach
The modelling and analysis of security protocols: the csp approach
Scalable automatic linearizability checking
Proceedings of the 33rd International Conference on Software Engineering
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Effective temporal logic model checking algorithms exist that exploit symmetries arising from parallel composition of multiple identical components. These algorithms often employ a function repfrom states to representative states under the symmetries exploited. We adapt this idea to the context of refinement checking for the process algebra CSP. In so doing, we must cope with refinement-style specifications. The main challenge, though, is the need for access to sufficient local information about states to enable definition of a useful repfunction, since compilation of CSP processes to Labelled Transition Systems (LTSs) renders state information a global property instead of a local one. Using a structured form of implementation transition system, we obtain an efficient symmetry exploiting CSP refinement checking algorithm, generalise it in two directions, and demonstrate all three variants on simple examples.