Practical Automated Partial Verification of Multi-paradigm Real-Time Models

Authors:
Carlo A. Furia;Matteo Pradella;Matteo Rossi
Affiliations:
Dipartimento di Elettronica e Informazione, Politecnico di Milano, Italy;CNR IEIIT-MI, Milano, Italy;Dipartimento di Elettronica e Informazione, Politecnico di Milano, Italy
Venue:
ICFEM '08 Proceedings of the 10th International Conference on Formal Methods and Software Engineering
Year:
2008

Citing 13
Cited 2

Specifying real-time properties with metric temporal logic

Real-Time Systems
Real-time logics: complexity and expressiveness

Information and Computation - Special issue: selections from 1990 IEEE symposium on logic in computer science
A theory of timed automata

Theoretical Computer Science
The benefits of relaxing punctuality

Journal of the ACM (JACM)
What Good Are Digital Clocks?

ICALP '92 Proceedings of the 19th International Colloquium on Automata, Languages and Programming
The Regular Real-Time Languages

ICALP '98 Proceedings of the 25th International Colloquium on Automata, Languages and Programming
Logics and Models of Real Time: A Survey

Proceedings of the Real-Time: Theory in Practice, REX Workshop
Almost ASAP semantics: from timed models to timed implementations

Formal Aspects of Computing
The symmetry of the past and of the future: bi-infinite time in the verification of temporal properties

Proceedings of the the 6th joint meeting of the European software engineering conference and the ACM SIGSOFT symposium on The foundations of software engineering
Automated Verification of Dense-Time MTL Specifications Via Discrete-Time Approximation

FM '08 Proceedings of the 15th international symposium on Formal Methods
Robust sampling for MITL specifications

FORMATS'07 Proceedings of the 5th international conference on Formal modeling and analysis of timed systems
Integrating discrete- and continuous-time metric temporal logics through sampling

FORMATS'06 Proceedings of the 4th international conference on Formal Modeling and Analysis of Timed Systems
From MITL to timed automata

FORMATS'06 Proceedings of the 4th international conference on Formal Modeling and Analysis of Timed Systems

A theory of sampling for continuous-time metric temporal logic

ACM Transactions on Computational Logic (TOCL)
Bounded satisfiability checking of metric temporal logic specifications

ACM Transactions on Software Engineering and Methodology (TOSEM) - In memoriam, fault detection and localization, formal methods, modeling and design

Quantified Score

Hi-index	0.00

Visualization

Abstract

This article introduces a fully automated verification technique that permits to analyze real-time systems described using a continuous notion of time and a mixture of operational (i.e., automata-based) and descriptive (i.e., logic-based) formalisms. The technique relies on the reduction, under reasonable assumptions, of the continuous-time verification problem to its discrete-time counterpart. This reconciles in a viable and effective way the dense/discrete and operational/descriptive dichotomies that are often encountered in practice when it comes to specifying and analyzing complex critical systems. The article investigates the applicability of the technique through a significant example centered on a communication protocol. Concurrent runs of the protocol are formalized by parallel instances of a Timed Automaton, while the synchronization rules between these instances are specified through Metric Temporal Logic formulas, thus creating a multi-paradigm model. Verification tests run on this model using a bounded satisfiability checker implementing the technique show consistent results and interesting performances.