Specifying real-time properties with metric temporal logic
Real-Time Systems
Symbolic model checking: 1020 states and beyond
Information and Computation - Special issue: Selections from 1990 IEEE symposium on logic in computer science
Memory-efficient algorithms for the verification of temporal properties
Formal Methods in System Design - Special issue on computer-aided verification: general methods
Theoretical Computer Science
Symbolic model checking for real-time systems
Information and Computation
Temporal verification of reactive systems: safety
Temporal verification of reactive systems: safety
The benefits of relaxing punctuality
Journal of the ACM (JACM)
Model checking
Journal of the ACM (JACM)
Simple on-the-fly automatic verification of linear temporal logic
Proceedings of the Fifteenth IFIP WG6.1 International Symposium on Protocol Specification, Testing and Verification XV
The Regular Real-Time Languages
ICALP '98 Proceedings of the 25th International Colloquium on Automata, Languages and Programming
Synthesizing Monitors for Safety Properties
TACAS '02 Proceedings of the 8th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
It's About Time: Real-Time Logics Reviewed
CONCUR '98 Proceedings of the 9th International Conference on Concurrency Theory
CONCUR '98 Proceedings of the 9th International Conference on Concurrency Theory
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Efficient Büchi Automata from LTL Formulae
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
Fast LTL to Büchi Automata Translation
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
IF-2.0: A Validation Environment for Component-Based Real-Time Systems
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Another Look at LTL Model Checking
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
Logics and Models of Real Time: A Survey
Proceedings of the Real-Time: Theory in Practice, REX Workshop
Proceedings of the Real-Time: Theory in Practice, REX Workshop
Reducing the number of clock variables of timed automata
RTSS '96 Proceedings of the 17th IEEE Real-Time Systems Symposium
On the Decidability of Metric Temporal Logic
LICS '05 Proceedings of the 20th Annual IEEE Symposium on Logic in Computer Science
Checking Timed Büchi Automata Emptiness Efficiently
Formal Methods in System Design
Nested emptiness search for generalized Büchi automata
Fundamenta Informaticae - Special issue on application of concurrency to system design (ACSD'04)
A compositional approach to CTL* verification
Theoretical Computer Science - Formal methods for components and objects
Logics for Real Time: Decidability and Complexity
Fundamenta Informaticae - Continuous Time Paradigms in Logic and Automata
Back to the future: towards a theory of timed regular languages
SFCS '92 Proceedings of the 33rd Annual Symposium on Foundations of Computer Science
Real time temporal logic: past, present, future
FORMATS'05 Proceedings of the Third international conference on Formal Modeling and Analysis of Timed Systems
Optimal tester synthesis for real-time systems
NOTERE '08 Proceedings of the 8th international conference on New technologies in distributed systems
On the Merits of Temporal Testers
25 Years of Model Checking
On Expressiveness and Complexity in Real-Time Model Checking
ICALP '08 Proceedings of the 35th international colloquium on Automata, Languages and Programming, Part II
MTL with Bounded Variability: Decidability and Complexity
FORMATS '08 Proceedings of the 6th international conference on Formal Modeling and Analysis of Timed Systems
Complexity results in revising UNITY programs
ACM Transactions on Autonomous and Adaptive Systems (TAAS)
Review: Formal verification of analog and mixed signal designs: A survey
Microelectronics Journal
Practical Automated Partial Verification of Multi-paradigm Real-Time Models
ICFEM '08 Proceedings of the 10th International Conference on Formal Methods and Software Engineering
Checking Timed Büchi Automata Emptiness Using LU-Abstractions
FORMATS '09 Proceedings of the 7th International Conference on Formal Modeling and Analysis of Timed Systems
Amir Pnueli and the dawn of hybrid systems
Proceedings of the 13th ACM international conference on Hybrid systems: computation and control
Hierarchical synthesis of hybrid controllers from temporal logic specifications
HSCC'07 Proceedings of the 10th international conference on Hybrid systems: computation and control
On synthesizing controllers from bounded-response properties
CAV'07 Proceedings of the 19th international conference on Computer aided verification
Robust sampling for MITL specifications
FORMATS'07 Proceedings of the 5th international conference on Formal modeling and analysis of timed systems
On the expressiveness of MTL variants over dense time
FORMATS'07 Proceedings of the 5th international conference on Formal modeling and analysis of timed systems
Checking temporal properties of discrete, timed and continuous behaviors
Pillars of computer science
A theory of sampling for continuous-time metric temporal logic
ACM Transactions on Computational Logic (TOCL)
Robust satisfaction of temporal logic over real-valued signals
FORMATS'10 Proceedings of the 8th international conference on Formal modeling and analysis of timed systems
From MTL to deterministic timed automata
FORMATS'10 Proceedings of the 8th international conference on Formal modeling and analysis of timed systems
Policy monitoring in first-order temporal logic
CAV'10 Proceedings of the 22nd international conference on Computer Aided Verification
Application of automated revision for UML models: a case study
ICDCN'12 Proceedings of the 13th international conference on Distributed Computing and Networking
Processing flows of information: From data stream to complex event processing
ACM Computing Surveys (CSUR)
Monitor-Based statistical model checking for weighted metric temporal logic
LPAR'12 Proceedings of the 18th international conference on Logic for Programming, Artificial Intelligence, and Reasoning
A compositional hierarchical monitoring automaton construction for LTL
ICTAC'12 Proceedings of the 9th international conference on Theoretical Aspects of Computing
On temporal logic and signal processing
ATVA'12 Proceedings of the 10th international conference on Automated Technology for Verification and Analysis
MR4UM: A framework for adding fault tolerance to UML state diagrams
Theoretical Computer Science
On MITL and alternating timed automata
FORMATS'13 Proceedings of the 11th international conference on Formal Modeling and Analysis of Timed Systems
A Translation of the Existential Model Checking Problem from MITL to HLTL
Fundamenta Informaticae
| Hi-index | 0.00 |
We show how to transform formulae written in the real-time temporal logic MITL into timed automata that recognize their satisfying models. This compositional construction is much simpler than previously known and can be easily implemented.