On the synthesis of a reactive module
POPL '89 Proceedings of the 16th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Specifying real-time properties with metric temporal logic
Real-Time Systems
Theoretical Computer Science
Symbolic model checking for real-time systems
Information and Computation
Temporal verification of reactive systems: safety
Temporal verification of reactive systems: safety
The benefits of relaxing punctuality
Journal of the ACM (JACM)
Journal of the ACM (JACM)
It's About Time: Real-Time Logics Reviewed
CONCUR '98 Proceedings of the 9th International Conference on Concurrency Theory
Specifying Timed State Sequences in Powerful Decidable Logics and Timed Automata
ProCoS Proceedings of the Third International Symposium Organized Jointly with the Working Group Provably Correct Systems on Formal Techniques in Real-Time and Fault-Tolerant Systems
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Logics and Models of Real Time: A Survey
Proceedings of the Real-Time: Theory in Practice, REX Workshop
Efficient monitoring of safety properties
International Journal on Software Tools for Technology Transfer (STTT) - Special section on tools and algorithms for the construction and analysis of systems
On the Decidability of Metric Temporal Logic
LICS '05 Proceedings of the 20th Annual IEEE Symposium on Logic in Computer Science
On the complexity of omega -automata
SFCS '88 Proceedings of the 29th Annual Symposium on Foundations of Computer Science
A Quantifier Elimination Algorithm for Linear Real Arithmetic
LPAR '08 Proceedings of the 15th International Conference on Logic for Programming, Artificial Intelligence, and Reasoning
When Are Timed Automata Determinizable?
ICALP '09 Proceedings of the 36th Internatilonal Collogquium on Automata, Languages and Programming: Part II
Realizability of Real-Time Logics
FORMATS '09 Proceedings of the 7th International Conference on Formal Modeling and Analysis of Timed Systems
Finite automata and their decision problems
IBM Journal of Research and Development
On synthesizing controllers from bounded-response properties
CAV'07 Proceedings of the 19th international conference on Computer aided verification
UPPAAL-Tiga: time for playing games!
CAV'07 Proceedings of the 19th international conference on Computer aided verification
Real time temporal logic: past, present, future
FORMATS'05 Proceedings of the Third international conference on Formal Modeling and Analysis of Timed Systems
FORMATS'06 Proceedings of the 4th international conference on Formal Modeling and Analysis of Timed Systems
Controller synthesis for MTL specifications
CONCUR'06 Proceedings of the 17th international conference on Concurrency Theory
Time-bounded verification of CTMCs against real-time specifications
FORMATS'11 Proceedings of the 9th international conference on Formal modeling and analysis of timed systems
On construction of safety signal automata for MITL[ u, s] using temporal projections
FORMATS'11 Proceedings of the 9th international conference on Formal modeling and analysis of timed systems
Monitor-Based statistical model checking for weighted metric temporal logic
LPAR'12 Proceedings of the 18th international conference on Logic for Programming, Artificial Intelligence, and Reasoning
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In this paper we propose a novel technique for constructing timed automata from properties expressed in the logic MTL, under bounded-variability assumptions. We handle full MTL and include all future operators. Our construction is based on separation of the continuous time monitoring of the input sequence and discrete predictions regarding the future. The separation of the continuous from the discrete allows us to determinize our automata in an exponential construction that does not increase the number of clocks. This leads to a doubly exponential construction from MTL to deterministic timed automata, compared with triply exponential using existing approaches. We offer an alternative to the existing approach to linear real-time model checking, which has never been implemented. It further offers a unified framework for model checking, runtime monitoring, and synthesis, in an approach that can reuse tools, implementations, and insights from the discrete setting.