Power reduction techniques for a spread spectrum based correlator
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Design of Analog CMOS Integrated Circuits
Design of Analog CMOS Integrated Circuits
Trends in local wireless networks
IEEE Communications Magazine
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A low-power switched-current matched filter (MF) for code-division multiple-access (CDMA) systems has been developed. The front-end voltage-to-current (V/I) converter has been eliminated by merging the function into each matching cell utilizing the MOS linear I-V characteristics. A low-power analog-to-digital (A/D) converter has also been developed to establish smooth interfacing to digital back-end processing for a delayed locked loop (DLL) and a RAKE receiver. A proof-of-concept chip was fabricated in a 0.35-@mm standard CMOS technology with a measured power consumption of 1.65mW at 11Mchip/s with 2-V power supply including the A/D converter.