A method for obtaining digital signatures and public-key cryptosystems
Communications of the ACM
Radix-4 modular multiplication and exponentiation algorithms for the RSA public-key cryptosystem
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
An RNS Montgomery Modular Multiplication Algorithm
IEEE Transactions on Computers
O(n)-depth circuit algorithm for modular exponentiation
ARITH '95 Proceedings of the 12th Symposium on Computer Arithmetic
Montgomery Modular Exponentiation on Reconfigurable Hardware
ARITH '99 Proceedings of the 14th IEEE Symposium on Computer Arithmetic
A Scalable Architecture for Modular Multiplication Based on Montgomery's Algorithm
IEEE Transactions on Computers
Power-aware, depth-optimum and area minimization mapping of K-LUT based FPGA circuits
WSEAS Transactions on Computers
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This paper proposes an efficient algorithm and Processing Element (PE) architecture for a Multiple Word Radix 4 Montgomery Modular (MWR4MM) multiplier. This architecture is developed considering an important design factor - power consumption - in addition to other design factors that is considered previously in many publications such as performance and scalability. To increase performance, we used a recoding scheme that eliminates the reduction step in the Montgomery algorithm and the PE architecture is based on the Carry-Save Adder (CSA). To achieve scalability, we implement the algorithm based on the multiple-word operation. Lastly to lower power consumption, we devised several effective techniques for reducing the glitches and the Expected Switching Activity (ESA) of high fan-out signals.