QC-fill: quick-and-cool X-filling for multicasting-based scan test
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
On reducing scan shift activity at RTL
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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This paper presents PHS-Fill, an ATPG technique that reduces(1) power supply noise for scan-based at-speed testing, and(2) test data volume in a Huffman coding based test compression environment. PHS-Fill first identifies the preferred Huffman symbols; these symbols correspond to the test pattern templates that improve test compression and reduces power supply noise at the same time. ATPG then biases its primary input assignments so that the test pattern blocks match the preferred symbols whenever possible. Simulation results on ISCAS89 and ITC99 benchmark circuits show that PHS-Fill is a promising solution.