Reversible Logic Synthesis with Output Permutation

Authors:
Robert Wille;Daniel Groβe;Gerhard W. Dueck;Rolf Drechsler
Affiliations:
-;-;-;-
Venue:
VLSID '09 Proceedings of the 2009 22nd International Conference on VLSI Design
Year:
2009

Citing 0
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Abstract

This paper presents a low-power LDPC decoder design for additive white Gaussian noise (AWGN) channels. The proposed decoding scheme provides constant-time decoding and thus facilitates real-time applications where guaranteed data rate is required. It ...