Computer architecture and organization; (2nd ed.)
Computer architecture and organization; (2nd ed.)
Ethernet: distributed packet switching for local computer networks
Communications of the ACM
VLSI Systems and Computations
A comparative study of distributed resource sharing on multiprocessors
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
PUMPS Architecture for Pattern Analysis and Image Database Management
IEEE Transactions on Computers
A systematic approach to the design of digital bussing structures
AFIPS '72 (Fall, part II) Proceedings of the December 5-7, 1972, fall joint computer conference, part II
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A VLSI-densed shared-bus distributed system is a computer system consisting of a large number of VLSI processing units (VPUs) connected to one another by a high-speed bus. Data traffic in such a system is characterized by three distinct features: large population, bursty transmission, and task-dependent accesses with priority. A bus arbitration scheme is required to resolve contentions when several VPUs generate requests simultaneously. Conventional schemes such as daisy chaining, polling, and independent requests are shown to be inadequate. In this paper, a multiaccess code-deciphering (MACD) scheme is proposed. Two versions of the scheme are studied. The first version is a load-dependent scheme that can resolve contentions of N VPUs in an average time of O(logK/2N) steps where K is equal to the bus width. The second version estimates the number of contending VPUs and resolves contention in a constant average time independent of load. The proposed schemes can support task-dependent accesses with priority.