Journal of the ACM (JACM)
A high-speed sorting procedure
Communications of the ACM
A generalization of the divide-sort-merge strategy for sorting networks
A generalization of the divide-sort-merge strategy for sorting networks
A lower bound for sorting networks that use the divide-sort-merge strategy
A lower bound for sorting networks that use the divide-sort-merge strategy
Large [g,d] sorting networks
A phenomenon in the theory of sorting
SWAT '70 Proceedings of the 11th Annual Symposium on Switching and Automata Theory (swat 1970)
Sorting networks and their applications
AFIPS '68 (Spring) Proceedings of the April 30--May 2, 1968, spring joint computer conference
Using symmetry and evolutionary search to minimize sorting networks
The Journal of Machine Learning Research
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An N-input sorting network, or an N-sorter, is a switching circuit with N outputs that satisfy the following: for any combination of inputs I = {ia, i1, ..., iN-1}, the resulting outputs 0 = {o0, o1, ..., oN-1} are a permutation of I, and o0≤o1≤...;≤oN-1. Batcher shows that a basic 2-sorter, or comparator cell, can be used to construct N-sorters for arbitrary N. For example, the circuit in Figure 1 is a 4-sorter, since comparators A through D move the smallest input to o0 and the largest input to o3, and then comparator E orders the remaining two inputs.