A locking protocol for resource coordination in distributed databases
ACM Transactions on Database Systems (TODS)
Shift Register Sequences
X-Tree: A tree structured multi-processor computer architecture
ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
Elections in a Distributed Computing System
IEEE Transactions on Computers
Theory and Implementation of p-Multiple Sequential Machines
IEEE Transactions on Computers
Problems of Designing Supersystems with Dynamic Architectures
IEEE Transactions on Computers
Micros, A Distributed Operating System for Micronet, A Reconfigurable Network Computer
IEEE Transactions on Computers
Reconfigurable multicomputer networks for very fast real-time applications
AFIPS '82 Proceedings of the June 7-10, 1982, national computer conference
Exploiting parallelism for the performance enhancement of non-numeric applications
AFIPS '82 Proceedings of the June 7-10, 1982, national computer conference
Data Exchange Optimization in Reconfigurable
IEEE Transactions on Computers
Efficient Internode Communications in Reconfigurable Binary Trees
IEEE Transactions on Computers
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This paper discusses fault-tolerant reconfigurations of a multicomputer network organized as a binary tree. The paper shows how to reconfigure a binary tree with faulty nonleaves with lost connectivity into a binary tree in which all faulty nodes become leaves or form more complex end-tree structures of higher dimension. In both cases the faulty nodes are disconnected from a reconfigured fault-tolerant tree, which continues to function as a gracefully degraded tree made completely out of fault-free nodes. The reconfiguration techniques developed are based on fine mathematical ideas of shift-register theory; they can be performed with only a single reconfiguration code (called a bias) that is sent concurrently to all fault-free nodes of a tree. The techniques for finding this reconfiguration code are also very simple. For the case in which all faulty nodes become leaves, the required reconfiguration code can be found during the time of one mod-2 addition (one clock period). For the case in which all faulty nodes form an i-dimensional end-tree, the necessary reconfiguration code can be found following a simple process that includes (i-1) mod-2 additions performed sequentially. Once the reconfiguration code is found, it is sent to all fault-free nodes of a binary tree. A fault-tolerant reconfiguration into a gracefully degraded tree with disconnected faulty nodes can be performed during the time of one clock period, since it includes the time of a one-bit shift and mod-2 addition.