A programmable voltage reference design

  • Authors:

  • R. Ouchen;A. Hamouda;S. Khaldi;N. Bouguechal;R. Arnold;A. Wiener;O. Manck

  • Affiliations:

  • Laboratoire d'Electronique Avancée, Département d'Electronique, Université de Batna, Batna, Algeria;Laboratoire d'Electronique Avancée, Département d'Electronique, Université de Batna, Batna, Algeria;Laboratoire d'Electronique Avancée, Département d'Electronique, Université de Batna, Batna, Algeria;Laboratoire d'Electronique Avancée, Département d'Electronique, Université de Batna, Batna, Algeria;Microelectronics and Technical Computing Institute, Technical University of Berlin, Berlin, Germany;Microelectronics and Technical Computing Institute, Technical University of Berlin, Berlin, Germany;Microelectronics and Technical Computing Institute, Technical University of Berlin, Berlin, Germany

  • Venue:
  • MINO'07 Proceedings of the 6th conference on Microelectronics, nanoelectronics, optoelectronics
  • Year:
  • 2007

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Abstract

The paper emphasizes the circuit innovations of a key analog function realized on the IAD GmbH DLC _2 family chip, a precision programmable voltage reference with superior performance capabilities dedicated for an integrated 10 bits D/A converter. The chip developed in co-operation of IAD and MAZ Brandenburg has been produced with 0.35µm CMOS switched capacitor technology from AMS, it can be used on the one hand within typical power-line applications, such us controlling and management, and the other hand for data communication, such as telephony or internet access. The programmable voltage reference is based on a new design that provides fast programmability between voltages and stable voltage operation from 0.25Vdda to 0.75Vdda. The main objective is to select a design that meets as close as possible criteria related to the chip specification requirements such as reliability, flexibility, and integration area. Consequently, an adequate programmable voltage reference is proposed which is 4 bits decoder-based converter architecture.