Reuse methodology manual: for system-on-a-chip designs
Reuse methodology manual: for system-on-a-chip designs
Discrete Time Processing of Speech Signals
Discrete Time Processing of Speech Signals
Pervasive Computing
System-on-Chip: Next Generation Electronics (Circuits, Devices and Systems) (Circuits, Devices and Systems)
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The design and implementation of a speech-feature extraction front-end module compliant to the Standard Aurora for Distributed Speech Recognition Systems (DSR) is presented in this paper. The design has been oriented towards its reusability in reconfigurable logic implementations. The number of samples of a frame, energy bands and mel-Cepstrum coefficients are parameterized. The design has been modelled in VHDL according to the restrictions and recommendations for high level synthesis, being portable among different EDA tools and technologically independent. The resulting design may be used as a core in the implementation of the client front-end part of Standard Aurora.