On line mode incremental Hough transform implementation on Xilinx Fpga's

Authors:
H. Bessalah;S. Seddiki;F. Alim;M. Bencherif
Affiliations:
Centre de Déloppement des Technologies Avancées, Alger, Algérie;Centre de Déloppement des Technologies Avancées, Alger, Algérie;Centre de Déloppement des Technologies Avancées, Alger, Algérie;Centre de Déloppement des Technologies Avancées, Alger, Algérie
Venue:
SSIP'08 Proceedings of the 8th conference on Signal, Speech and image processing
Year:
2008

Citing 5
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Abstract

Knowing that, the computing process of the Incremental Hough Transform (IHT) is characterized by a purely sequential structure, and from the fact, the on line mode arithmetic is more suitable for the computation of this kind of operations. We propose in this paper, a new Incremental Hough Transform algorithm and a suitable architecture implemented on a Xilinx FPGA circuit. In this study, we will show how on line arithmetic is used to implement a pipelined architecture of the Incremental Hough Transform and we will demonstrate that it might be used successfully for real time applications.