Energy Efficient Elliptic Curve Processor

Authors:
Maurice Keller;William Marnane
Affiliations:
Dept. of Electrical and Electronic Engineering, University College Cork, Cork City, Ireland;Dept. of Electrical and Electronic Engineering, University College Cork, Cork City, Ireland
Venue:
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Year:
2009

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Abstract

Elliptic curve cryptography is highly suited for implementation in resource constrained environments, however, dedicated hardware accelerators are necessary to provide the low power/energy security required in small, battery powered devices. This paper presents a low energy ASIC implementation of an elliptic curve processor which consumes minimal energy per point multiplication, thereby prolonging battery life in constrained devices. The energy/power/area trade-off is explored. In 0.13 μm CMOS technology the architecture consumes a minimum of 1.32μJ at 500 kHz using a digit size of 15 and 24.6 kgates.