CellSs: Scheduling techniques to better exploit memory hierarchy

  • Authors:

  • Pieter Bellens;Josep M. Perez;Felipe Cabarcas;Alex Ramirez;Rosa M. Badia;Jesus Labarta

  • Affiliations:

  • Barcelona Supercomputing Center - Centro Nacional de Supercomputació/n, Barcelona, Spain;Barcelona Supercomputing Center - Centro Nacional de Supercomputació/n, Barcelona, Spain;Computer Architecture Department, Universitat Politè/cnica de Catalunya, Barcelona, Spain and Universidad de Antioquia, Medellí/n, Colombia;Barcelona Supercomputing Center - Centro Nacional de Supercomputació/n, Barcelona, Spain and Computer Architecture Department, Universitat Politè/cnica de Catalunya, Barcelona, Spain;(Correspd. Tel.: +34 934034075/ Fax: +34 934037721/ E-mail: rosa.m.badia@bsc.es) Barcelona Supercomputing Center - Centro Nacional de Supercomputació/n, Barcelona, Spain and Consejo Superior d ...;Barcelona Supercomputing Center - Centro Nacional de Supercomputació/n, Barcelona, Spain and Computer Architecture Department, Universitat Politè/cnica de Catalunya, Barcelona, Spain

  • Venue:
  • Scientific Programming - High Performance Computing with the Cell Broadband Engine
  • Year:
  • 2009

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Abstract

Cell Superscalar's (CellSs) main goal is to provide a simple, flexible and easy programming approach for the Cell Broadband Engine (Cell/B.E.) that automatically exploits the inherent concurrency of the applications at a task level. The CellSs environment is based on a source-to-source compiler that translates annotated C or Fortran code and a runtime library tailored for the Cell/B.E. that takes care of the concurrent execution of the application. The first efforts for task scheduling in CellSs derived from very simple heuristics. This paper presents new scheduling techniques that have been developed for CellSs for the purpose of improving an application's performance. Additionally, the design of a new scheduling algorithm is detailed and the algorithm evaluated. The CellSs scheduler takes an extension of the memory hierarchy for Cell/B.E. into account, with a cache memory shared between the SPEs. All new scheduling practices have been evaluated showing better behavior of our system.