An automated design approach for CMOS LDO regulators

Authors:
Samiran DasGupta;Pradip Mandal
Affiliations:
Indian Institute of Technology, Kharagpur, India;Indian Institute of Technology, Kharagpur, India
Venue:
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Year:
2009

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Abstract

This paper presents a method for optimal sizing of CMOS low drop out regulator circuits. The technique relies on the observation that many of the performance metrics of a LDO regulator can be approximated as posynomial functions of design variables. This allows the design problem to be cast as a geometric program. Geometric program is particularly attractive as the tool for optimization as --1)it can be solved very efficiently, 2)it always finds the global minima, 3)infeasible specifications are readily determined and 4)the final solution is completely independent of the initial guess. As a result CMOS LDOs may be conveniently synthesized; moreover the optimal trade off curves between the competing performance metrics, can be obtained very fast.