Formal Memory Models for the Verification of Low-Level Operating-System Code

Authors:
Hendrik Tews;Marcus Völp;Tjark Weber
Affiliations:
Institute for Computing and Information Sciences, Radboud Universiteit Nijmegen, Nijmegen, The Netherlands;Institute for System Architecture, Technische Universität Dresden, Dresden, Germany;Computer Laboratory, University of Cambridge, Cambridge, UK
Venue:
Journal of Automated Reasoning
Year:
2009

Citing 11
Cited 4

Kit: A Study in Operating System Verification

IEEE Transactions on Software Engineering
Specification and verification of the UCLA Unix security kernel

Communications of the ACM
PVS: Combining Specification, Proof Checking, and Model Checking

CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Dealing with I/O Devices in the Context of Pervasive System Verification

ICCD '05 Proceedings of the 2005 International Conference on Computer Design
Types, bytes, and separation logic

Proceedings of the 34th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Putting it all together – Formal verification of the VAMP

International Journal on Software Tools for Technology Transfer (STTT) - A View from Formal Methods 2003 (pp 301-354); Special Section on Recent Advances in Hardware Verification (pp 355-447)
Structured Types and Separation Logic

Electronic Notes in Theoretical Computer Science (ENTCS)
A Logic for Virtual Memory

Electronic Notes in Theoretical Computer Science (ENTCS)
A Formal Model of Memory Peculiarities for the Verification of Low-Level Operating-System Code

Electronic Notes in Theoretical Computer Science (ENTCS)
On the architecture of system verification environments

HVC'07 Proceedings of the 3rd international Haifa verification conference on Hardware and software: verification and testing
A unified memory model for pointers

LPAR'05 Proceedings of the 12th international conference on Logic for Programming, Artificial Intelligence, and Reasoning

Types, Maps and Separation Logic

TPHOLs '09 Proceedings of the 22nd International Conference on Theorem Proving in Higher Order Logics
Preemption Abstraction

FMICS '09 Proceedings of the 14th International Workshop on Formal Methods for Industrial Critical Systems
Capability wrangling made easy: debugging on a microkernel with valgrind

Proceedings of the 6th ACM SIGPLAN/SIGOPS international conference on Virtual execution environments
Automated verification of a small hypervisor

VSTTE'10 Proceedings of the Third international conference on Verified software: theories, tools, experiments

Quantified Score

Hi-index	0.00

Visualization

Abstract

This article contributes to the field of operating-systems verification. It presents a formalization of virtual memory that extends to memory-mapped devices. Our formalization consists of a stack of three detailed formal memory models: physical memory (i.e., RAM), physically-addressable memory-mapped devices (including their respective side effects, access and alignment requirements), and page-table based virtual memory. Each model is formally shown to satisfy the plain-memory specification, a memory abstraction that enables efficient reasoning for type-correct programs. This stack of memory models was developed in an attempt to verify Nova, the Robin micro-hypervisor. It is a key component of our verification environment for operating-system kernels based on the interactive theorem prover PVS.