Fault-tolerant algorithms for tick-generation in asynchronous logic: robust pulse generation
SSS'11 Proceedings of the 13th international conference on Stabilization, safety, and security of distributed systems
Journal of Computer and System Sciences
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To the casual observer, glitches occurring in quasi delay-insensitive logic would appear to cause incorrect operation and render the circuits unusable. This paper presents an informal analysis of the effects of glitches occurring on the long interconnect ...