Incremental SAT Instance Generation for SAT-based ATPG

  • Authors:
  • Daniel Tille;Rolf Drechsler

  • Affiliations:
  • Institute of Computer Science, University of Bremen, 28359 Bremen, Germany, tille@informatik.uni-bremen.de;Institute of Computer Science, University of Bremen, 28359 Bremen, Germany, drechsle@informatik.uni-bremen.de

  • Venue:
  • DDECS '08 Proceedings of the 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems
  • Year:
  • 2008

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Abstract

Due to ever increasing design sizes more efficient tools for Automatic Test Pattern Generation (ATPG) are needed. Recently ATPG based on Boolean satisfiability (SAT) has been shown to be a beneficial complement to traditional ATPG techniques. This paper makes two contributions. Firstly, we analyze the two steps SAT-based ATPG consists of with respect to their run time on industrial benchmarks. Secondly, exploiting these analysis results, we propose an incremental solving technique with the objective to speed up the entire classification process. An experimental evaluation of the proposed method shows a significant reduction of the overall run time of the SAT-based ATPG process.