Rapid Prototyping of NoC Architectures from a SystemC Specification

Authors:
Stanislaw Deniziak;Robert Tomaszewski
Affiliations:
Cracow University of Technology, Dept. of Computer Engineering, Cracow, Poland, email: s.deniziak@computer.org;Kielce University of Technology, Dept. of Computer Science, Kielce, Poland, email: r.tomaszewski@tu.kielce.pl
Venue:
DDECS '08 Proceedings of the 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems
Year:
2008

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Abstract

This work presents a methodology for mapping of a SystemC specification onto a given Network-on-Chip (NoC) architecture, for the purpose of FPGA prototyping. A communication protocol and routing tables are generated automatically by using inter-module communication analysis. For each processor in the target architecture, assigned SystemC processes are converted into C++ programs, where all communication method calls are replaced with sending/receiving messages to/from the network interface (NI) process. For each module implemented in hardware a VHDL code of the NI is generated. NIs convert transmitted data into/from network packets according to the communication protocol. Presented embedded HTTP server example substantiates the benefits of the methodology.