An Analysis of I/O And Syscalls In Critical Sections And Their Implications For Transactional Memory

Authors:
Lee Baugh;Craig Zilles
Affiliations:
Dept. of Computer Science, University of Illinois at Urbana-Champaign, leebaugh@cs.uiuc.edu;Dept. of Computer Science, University of Illinois at Urbana-Champaign, zilles@cs.uiuc.edu
Venue:
ISPASS '08 Proceedings of the ISPASS 2008 - IEEE International Symposium on Performance Analysis of Systems and software
Year:
2008

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Abstract

In this paper we explore microprocessor performance models implemented on FPGAs. While FPGAs can help with simulation speed, the increased implementation complexity can degrade model development time. We assess whether a simulator split into closely-coupled ...