Communication-aware heuristics for run-time task mapping on NoC-based MPSoC platforms
Journal of Systems Architecture: the EUROMICRO Journal
Dynamic and adaptive allocation of applications on MPSoC platforms
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Platform synthesis and partitioning of real-time tasks for energy efficiency
Journal of Systems Architecture: the EUROMICRO Journal
Mapping on multi/many-core systems: survey of current and emerging trends
Proceedings of the 50th Annual Design Automation Conference
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Multiprocessor SOC platforms have been adopted for a wide range of high performance applications. Task assignment and processing unit allocation are key steps in the design of predictable and efficient embedded systems. Provided that the probability distributions and mutual exclusion conditions for executing applications are known a priori, this paper explores the mapping of tasks onto processing units while minimizing the expected average power consumption. The underlying model considers static (leakage) and dynamic power. This study shows that deriving approximative solutions with a constant worst-case approximation factor in polynomial time is not achievable unless P = NP, even if a feasible task mapping is provided as an input. A polynomial-time heuristic algorithm is proposed that applies a multiple-step heuristic. Experimental results reveal the effectiveness of the proposed algorithm by comparing the derived solutions to the optimal ones, obtained via an integer linear program (ILP) specification.