An Optimizing Compiler for an SPAP Architecture Using AI Tools

Authors:
Helnye Azaria;Adrian Dvir
Affiliations:
Ben-Gurion Univ. of the Negev, Beer-Sheva, Israel;Ben-Gurion Univ. of the Negev, Beer-Sheva, Israel
Venue:
Computer
Year:
1992

Citing 2
Cited 1

Computer Architecture and Parallel Processing

Computer Architecture and Parallel Processing
Linear Control System Analysis and Design

Linear Control System Analysis and Design

Optimized code generation for programmable digital signal processors

ICASSP'93 Proceedings of the 1993 IEEE international conference on Acoustics, speech, and signal processing: plenary, special, audio, underwater acoustics, VLSI, neural networks - Volume I

Quantified Score

Hi-index	4.10

Visualization

Abstract

A methodology that allows users to efficiently bridge the gap between high-level language and low-level microcode when implementing intensive mathematical operations and manipulations algorithms is discussed. The use of an optimized special-purpose array processor (SPAP) architecture for numerical computation and a host microprocessor for nonnumerical computation operations is described. The advantages of the optimizing compiler, the target architecture, and the compiler's implementation using AI tools are examined.