Optimized code generation for programmable digital signal processors

  • Authors:
  • Kin H. Yu;Yu Hen Hu

  • Affiliations:
  • Dept. of Electrical and Computer Engineering, University of Wisconsin - Madison, Madison, WI;Dept. of Electrical and Computer Engineering, University of Wisconsin - Madison, Madison, WI

  • Venue:
  • ICASSP'93 Proceedings of the 1993 IEEE international conference on Acoustics, speech, and signal processing: plenary, special, audio, underwater acoustics, VLSI, neural networks - Volume I
  • Year:
  • 1993

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Abstract

In this paper, we present a novel compilation model for optimized code generation for Programmable Digital Signal Processors (PDSP). The model uses Artificial Intelligence techniques to yield output code that is comparable (in some cases superior) to that of handwritten assembly codes by DSP experts. Porting the code generator to different PDSPs requires modifying only two processor-dependent modules: a Pattern Library and a Rule Base. A prototype code generator has been implemented, targeting a subset of the TMS32020's architecture and instruction set. Several case studies are presented, which demonstrates the feasibility of the proposed approach.