Towards Performance Prediction of Compositional Models in Industrial GALS Designs

Authors:
Nicolas Coste;Holger Hermanns;Etienne Lantreibecq;Wendelin Serwe
Affiliations:
INRIA Grenoble --- Rhône-Alpes, VASY project team, and STMicroelectronics Grenoble,;INRIA Grenoble --- Rhône-Alpes, VASY project team, and Universität des Saarlandes,;STMicroelectronics Grenoble,;INRIA Grenoble --- Rhône-Alpes, VASY project team,
Venue:
CAV '09 Proceedings of the 21st International Conference on Computer Aided Verification
Year:
2009

Citing 9
Cited 7

The algebra of timed processes, ATP: theory and application

Information and Computation
Time and Probability in Formal Design of Distributed Systems

Time and Probability in Formal Design of Distributed Systems
Priority and Maximal Progress Are Completely Axioatisable (Extended Abstract)

CONCUR '98 Proceedings of the 9th International Conference on Concurrency Theory
Compositional Verification of Probabilistic Processes

CONCUR '92 Proceedings of the Third International Conference on Concurrency Theory
An Overview and Synthesis on Timed Process Algebras

CAV '91 Proceedings of the 3rd International Workshop on Computer Aided Verification
Adventures in the Evolution of a High-Bandwidth Network for Central Servers

LISA '94 Proceedings of the 8th USENIX conference on System administration
Quantitative evaluation in embedded system design: validation of multiprocessor multithreaded architectures

Proceedings of the conference on Design, automation and test in Europe
Branching Bisimulation Congruence for Probabilistic Systems

Electronic Notes in Theoretical Computer Science (ENTCS)
CADP 2006: a toolbox for the construction and analysis of distributed processes

CAV'07 Proceedings of the 19th international conference on Computer aided verification

Time-bounded reachability in distributed input/output interactive probabilistic chains

SPIN'10 Proceedings of the 17th international SPIN conference on Model checking software
The how and why of interactive Markov chains

FMCO'09 Proceedings of the 8th international conference on Formal methods for components and objects
Ten years of performance evaluation for concurrent systems using CADP

ISoLA'10 Proceedings of the 4th international conference on Leveraging applications of formal methods, verification, and validation - Volume Part II
Branching bisimulation congruence for probabilistic systems

Theoretical Computer Science
Model checking interactive markov chains

TACAS'10 Proceedings of the 16th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Quantitative timed analysis of interactive markov chains

NFM'12 Proceedings of the 4th international conference on NASA Formal Methods
Modelling, reduction and analysis of markov automata

QEST'13 Proceedings of the 10th international conference on Quantitative Evaluation of Systems

Quantified Score

Hi-index	0.00

Visualization

Abstract

Systems and Networks on Chips (NoCs) are a prime design focus of many hardware manufacturers. In addition to functional verification, which is a difficult necessity, the chip designers are facing extremely demanding performance prediction challenges, such as the need to estimate the latency of memory accesses over the NoC. This paper attacks this problem in the setting of designing globally asynchronous, locally synchronous systems (GALS). We describe foundations and applications of a combination of compositional modeling, model checking, and Markov process theory, to arrive at a viable approach to compute performance quantities directly on industrial, functionally verified GALS models.