Quantitative evaluation in embedded system design: validation of multiprocessor multithreaded architectures

  • Authors:
  • Nicolas Coste;Holger Hermanns;Yvain Thonnart;Hubert Garavel;Richard Hersemeule;Meriem Zidouni

  • Affiliations:
  • STMicroelectronics, Grenoble, France;Saarland University, Saarbrücken, Germany;CEA/Leti, Grenoble, France;INRIA, Grenoble, France;STMicroelectronics, Grenoble, France;Bull, Les Clayes-sous-Bois, France

  • Venue:
  • Proceedings of the conference on Design, automation and test in Europe
  • Year:
  • 2008

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Abstract

As levels of parallelism are becoming increasingly complex in multiprocessor architectures, GALS, and asynchronous circuits, methodologies and software tools are needed to verify their functional behavior (qualitative properties) and to predict their performance (quantitative properties). This paper presents the work currently done in the Multival project (pôle de compétitivité mondial Minalogic), in which verification and performance evaluation tools developed at INRIA and Saarland University are applied to three industrial architectures designed by Bull, CEA/Leti and STMicroelectronics.