Efficiently computing static single assignment form and the control dependence graph
ACM Transactions on Programming Languages and Systems (TOPLAS)
Translation validation for an optimizing compiler
PLDI '00 Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation
Translation Validation for Synchronous Languages
ICALP '98 Proceedings of the 25th International Colloquium on Automata, Languages and Programming
Mutation-based test case generation for simulink models
FMCO'09 Proceedings of the 8th international conference on Formal methods for components and objects
Translation validation for a verified OS kernel
Proceedings of the 34th ACM SIGPLAN conference on Programming language design and implementation
Bit-precise formal verification of discrete-time MATLAB/Simulink models using SMT solving
Proceedings of the Eleventh ACM International Conference on Embedded Software
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Translation validation is a technique for formally establishing the semantic equivalence of the source and the target of a code generator. In this work we present a translation validation tool for the Real-Time Workshop code generator that receives as input Simulink models and generates optimized C code.