Near-Optimal Microprocessor and Accelerators Codesign with Latency and Throughput Constraints
ACM Transactions on Architecture and Code Optimization (TACO)
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Real time object tracking finds its applications in diverse fields. An online embedded system for image tracking should be fast, accurate, robust and efficient. This paper presents a hardware based architecture and implementation of an Image Coprocessor on FPGA using Verilog Hardware Description Language. The core concept is to ensure a fast and memory efficient dedicated hardware which could increase the efficiency manifolds and enhance the overall output, thereby making real time detection and tracking possible at much higher rates than achievable using C++. The design was simulated using Xilinx ISE Simulator and ModelSim. An embedded system was later on developed for complete implementation of Image Coprocessor on FPGA, using Xilinx Embedded Development Kit. Six modules including Edge Image, Bhattacharya Coefficient, Histograms, Epanechnikov Kernel, Translation and Rotation have been implemented on FPGA, and a comparison has been made with their implementation in C++. The results demonstrate up to 66 times improved performance of these individual modules. Thus, an efficient Image Coprocessor has been developed.