Retargetable Code Generation for Digital Signal Processors
Retargetable Code Generation for Digital Signal Processors
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Flexible Application Specific Instruction set Processors (ASIP) are starting to replace monolithic ASICs in a vide variety of fields. However the design of an ASIP is today a substantial design effort. This paper discusses ${\ensuremath{\mathfrak{NoGap}}}$ (Novel Generator for ASIP) a tool for ASIP designs utilizing hardware multiplexed data paths. One of the main advantages of ${\ensuremath{\mathfrak{NoGap}}}$ compared to other ADL tools is that it does not impose limits on the architecture and thus design freedom. To reach this flexibility ${\ensuremath{\mathfrak{NoGap}}}$ makes heavy use of the compositional design principle and is therefore divided into three parts $\mathfrak{Mage}$, ${\ensuremath{\mathfrak{Mase}}}$, and ${\ensuremath{\mathfrak{Castle}}}$. This paper presents the central concepts of ${\ensuremath{\mathfrak{NoGap}}}$ to show that it is possible to reach this advertised flexibility and still be able to generate HDL code and tools such as simulators and assemblers.