Communicating sequential processes
Communicating sequential processes
Learning regular sets from queries and counterexamples
Information and Computation
Inference of finite automata using homing sequences
Information and Computation
Communication and Concurrency
The Theory and Practice of Concurrency
The Theory and Practice of Concurrency
Partial-Order Methods for Temporal Verification
CONCUR '93 Proceedings of the 4th International Conference on Concurrency Theory
Liveness with (0, 1, infty)-Counter Abstraction
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Reducing Model Checking of the Many to the Few
CADE-17 Proceedings of the 17th International Conference on Automated Deduction
Assumption Generation for Software Component Verification
Proceedings of the 17th IEEE international conference on Automated software engineering
Proofs of Networks of Processes
IEEE Transactions on Software Engineering
Insights to Angluin's Learning
Electronic Notes in Theoretical Computer Science (ENTCS)
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Compositional verification using assume-guarantee reasoning has recently seen an uprise due to the introduction of automatic techniques for learning assumptions. In this paper, we transfer this technique to a setting with CSP as modelling and property specification language, and present an approach to compositional traces refinement checking. The approach has been implemented using the CSP model checker FDR as teacher during learning. The implementation shows that the compositional approach can both drastically outperform as well as underperform FDR's performance, depending on the example at hand.