Software Transactional Memories: An Approach for Multicore Programming

  • Authors:
  • Damien Imbs;Michel Raynal

  • Affiliations:
  • IRISA, Université de Rennes 1, Rennes, France 35042;IRISA, Université de Rennes 1, Rennes, France 35042

  • Venue:
  • PaCT '09 Proceedings of the 10th International Conference on Parallel Computing Technologies
  • Year:
  • 2009

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Abstract

The recent advance of multicore architectures and the deployment of multiprocessors as the mainstream computing platforms have given rise to a new concurrent programming impetus. Software transactional memories (STM) are one of the most promising approach to take up this challenge. The aim of a STM system is to discharge the application programmer from the management of synchronization when he/she has to write multiprocess programs. His/her task is to decompose his/her program in a set of sequential tasks that access shared objects, and to decompose each task in atomic units of computation. The management of the required synchronization is ensured by the associated STM system. This paper presents two STM systems, and a formal proof for the second one. Such a proof -that is not trivial- is one of the very first proofs of a STM system. In that sense, this paper strives to contribute to the establishment of theoretical foundations for STM systems.