Design of Analog CMOS Integrated Circuits
Design of Analog CMOS Integrated Circuits
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This paper proposes a new pulse-frequency-modulation (PFM) digital pixel sensor (DPS) with a variable reference voltage. An in-pixel variable reference voltage generator is employed to ramp the reference voltage of the comparator locally such that the comparison of photo diode current and the reference voltage can take place earlier. This expands the dynamic range of the pixel sensor when the level of illumination is low. The complexity of routing of the proposed pixel sensor are comparable to that of digital pixel sensor with a constant reference voltage. The additional hardware cost of the proposed digital pixel sensor is only a capacitor and two static inverters, resulting in a fill factor that is comparable to those of digital pixel sensors with a constant global reference voltage. Factors that are critically to the performance of the proposed pixel sensor are examined in detail. The proposed digital pixel sensor has been designed in TSMC-0.18 μm 1.8 V CMOS technology and analyzed using Spectre with BSIM3V3 device models. Simulation results demonstrate that the proposed PFM digital pixel has a dynamic range of 120 dB when the integration time is set to 60 μs, approximately 40 dB more than the corresponding PFM digital pixel sensor with a constant reference voltage. The fill factor of the proposed pixel sensor is 20%, comparable to that of pixel sensors with a constant reference voltage.