An optimal and processor efficient parallel sorting algorithm on a linear array with a reconfigurable pipelined bus system

  • Authors:
  • Min He;Xiaolong Wu;Si Qing Zheng

  • Affiliations:
  • Department of Computer Engineering and Computer Science, California State University Long Beach, 1250 Bellflower Blvd., Long Beach, CA 90840, United States;Department of Computer Engineering and Computer Science, California State University Long Beach, 1250 Bellflower Blvd., Long Beach, CA 90840, United States;Department of Computer Science, Erik Jonsson School of Engineering and Computer Science, 800 West Campbell Rd., EC31, University of Texas at Dallas, Richardson, TX 75080-3021, United States

  • Venue:
  • Computers and Electrical Engineering
  • Year:
  • 2009

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Abstract

Optical interconnections attract many engineers and scientists' attention due to their potential for gigahertz transfer rates and concurrent access to the bus in a pipelined fashion. These unique characteristics of optical interconnections give us the opportunity to reconsider traditional algorithms designed for ideal parallel computing models, such as PRAMs. Since the PRAM model is far from practice, not all algorithms designed on this model can be implemented on a realistic parallel computing system. From this point of view, we study Cole's pipelined merge sort [Cole R. Parallel merge sort. SIAM J Comput 1988;14:770-85] on the CREW PRAM and extend it in an innovative way to an optical interconnection model, the LARPBS (Linear Array with Reconfigurable Pipelined Bus System) model [Pan Y, Li K. Linear array with a reconfigurable pipelined bus system-concepts and applications. J Inform Sci 1998;106;237-58]. Although Cole's algorithm is optimal, communication details have not been provided due to the fact that it is designed for a PRAM. We close this gap in our sorting algorithm on the LARPBS model and obtain an O(logN)-time optimal sorting algorithm using O(N) processors. This is a substantial improvement over the previous best sorting algorithm on the LARPBS model that runs in O(logNloglogN) worst-case time using N processors [Datta A, Soundaralakshmi S, Owens R. Fast sorting algorithms on a linear array with a reconfigurable pipelined bus system. IEEE Trans Parallel Distribut Syst 2002;13(3):212-22]. Our solution allows efficiently assign and reuse processors. We also discover two new properties of Cole's sorting algorithm that are presented as lemmas in this paper.