Matrix multiplication via arithmetic progressions
Journal of Symbolic Computation - Special issue on computational algebraic complexity
Pipelined communications in optically interconnected arrays
Journal of Parallel and Distributed Computing
An introduction to parallel algorithms
An introduction to parallel algorithms
Wavelength Division Multiple Access Channel Hypercube Processor Interconnection
IEEE Transactions on Computers
Polynomial and matrix computations (vol. 1): fundamental algorithms
Polynomial and matrix computations (vol. 1): fundamental algorithms
Singular value decomposition on processor arrays with a pipelined bus system
Journal of Network and Computer Applications
Parallel computation: models and methods
Parallel computation: models and methods
Sorting, Selection, and Routing on the Array with Reconfigurable Optical Buses
IEEE Transactions on Parallel and Distributed Systems
Linear array with a reconfigurable pipelined bus system—concepts and applications
Information Sciences: an International Journal - special issue on parallel and distributed processing
The Design and Analysis of Computer Algorithms
The Design and Analysis of Computer Algorithms
Time-Division Optical Communications in Multiprocessor Arrays
IEEE Transactions on Computers
IEEE Transactions on Parallel and Distributed Systems
Parallel Matrix Multiplication on a Linear Array with a Reconfigurable Pipelined Bus System
IPPS '99/SPDP '99 Proceedings of the 13th International Symposium on Parallel Processing and the 10th Symposium on Parallel and Distributed Processing
Quicksort on a Linear Array with a Reconfigurable Pipelined Bus System
ISPAN '96 Proceedings of the 1996 International Symposium on Parallel Architectures, Algorithms and Networks
Computation and communication aspects of arrays with optical pipelined buses
Computation and communication aspects of arrays with optical pipelined buses
IEEE Transactions on Parallel and Distributed Systems
Parallel Matrix Multiplication on a Linear Array with a Reconfigurable Pipelined Bus System
IEEE Transactions on Computers
Fast Sorting Algorithms on a Linear Array with a Reconfigurable Pipelined Bus System
IEEE Transactions on Parallel and Distributed Systems
More Efficient Topological Sort Using Reconfigurable Optical Buses
The Journal of Supercomputing
Computers and Electrical Engineering
Processor-efficient sparse matrix-vector multiplication
Computers & Mathematics with Applications
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We show that the product of two N × N boolean matrices can becalculated in constant time on an LARPBS with O(N3 / log N)processors. All data communications and computations are performed on thebit level. To the best of the author‘s knowledge, this is the first parallelboolean matrix multiplication algorithm that has constant execution time,and is executed on a distributed memory system with (N3)processors. By using our boolean matrix multiplication algorithm, it isshown that the transitive closure of a directed graph can be obtained inO(log N) time ( measured by bit level operations) on anLARPBS with O (N3 / log N) processors. To the best of ourknowledge, this is the first parallel algorithm for tansitive closure ofdirected graphs with time complexity O(log N) (comparable tothat of CRCW PRAM) and cost O (N3) on a realistic parallelcomputing model, which has no shared memory, and interprocessorcommunications are dealt with explicitly and efficiently.