A simple on-line bin-packing algorithm
Journal of the ACM (JACM)
Fast Template Placement for Reconfigurable Computing Systems
IEEE Design & Test
Fast Online Task Placement on FPGAs: Free Space Partitioning and 2D-Hashing
IPDPS '03 Proceedings of the 17th International Symposium on Parallel and Distributed Processing
A Flexible and Energy-Efficient Coarse-Grained Reconfigurable Architecture for Mobile Systems
The Journal of Supercomputing
Synchroscalar: A Multiple Clock Domain, Power-Aware, Tile-Based Embedded Processor
Proceedings of the 31st annual international symposium on Computer architecture
Proceedings of the 42nd annual Design Automation Conference
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In the era of application convergence, the small handheld battery-powered portable devices are required to multiplex their limited hardware resources between many complex applications. Our first contribution in this paper is a modular and block based configuration architecture for modern FPGAs like Xilinx's Virtex-4 and Virtex-5 devices, to increase multi-tasking capabilities, power savings and performance improvement of applications for mobile handsets. Our second contribution is an on-line placement algorithm based on bin packing, called Hierarchical Best Fit Ascending (HBFA) algorithm, which is more efficient than Best Fit (BF) algorithm for mapping a dynamic task list onto the FPGA. The overall time complexity of the proposed on-line placement algorithm, HBFA, is reduced to O(n) in comparison to the complexity of BF algorithm which is O(n2). The placement solution provided by HBFA algorithm is also better than that of BF algorithm.